MULTI-ISA ASSEMBLER

XIRASM

One assembler that writes multiple instruction sets.

Multi-architecture support: assembly for x86, AArch64, RISC-V, and SPIR-V. The compile-time language provides types, functions, and DSLs for batch code generation, executable format implementation, and custom instruction sets — all inside XIRASM, from source to final bytes, with no external toolchain.

Download 0.3.5 View on GitHub

X86 / 32 + 64 AARCH64 / ARM64 RISC-V / RV32 + RV64 SPIR-V / MODULE + TEXT FORMAT DSL / PE + COFF + ELF + MACH-O

01 / ASSEMBLY LANGUAGE

Beyond assembly source, modern high-level syntax replaces the old-school macro era.

Processor instructions are written in assembly syntax. Batch generation, data processing, and binary construction go to the compile-time language: write functions, define types, call built-ins — the assembler computes every byte.

Familiar instruction syntax

Labels and instructions are written exactly as in the assembly you already know.

A complete language at assembly time

Types, functions, control flow, collections, and modules are all available — no more wrestling with nested text macros.

Write your own DSLs

Create reusable languages for formats, tables, protocols, firmware images, and project-specific rules.

x86.use64();

fn emit_square_table(count: u8) {
    for value in range(0, count) {
        dd(value * value);
    }
}

const answer: u32 = 40 + 2;

entry:
    mov eax, answer
    ret

table:
emit_square_table(4);

FORMAT DSLPE + COFF + ELF + MACH-O

02 / MULTI-ISA

Switch instruction sets, keep the way you work.

All four instruction sets share one project model and one compile-time language; each keeps its own syntax and encoding rules, unchanged.

x86

NATIVE MACHINE CODE

Generate x86-64 and x86-32 machine code directly — for systems software, tools, and experiments.

X86-64X86-32

AArch64

FULL ARM64 ENCODING

From scalar, floating-point, and SIMD to atomic, cryptographic, pointer-authentication, MOPS, and CSSC — modern ARM64 instructions, fully covered.

ARM64NEONMOPS

RISC-V

XLEN-AWARE

RV64 and RV32 both assemble with the same language and the same reusable modules.

RV64RV32

SPIR-V

GPU IR MODULES

SPIR-V has its own text syntax and word-encoding rules, handled the way GPU IR actually works — not forced into a CPU assembly model.

MODULETEXTWORDS

03 / WHAT YOU CAN BUILD

From instructions to finished binaries, one tool does it all.

Generated tables, wrapped formats, custom images — one language end to end, with output straight to final bytes.

TYPE

Complete compile-time programming

Types, functions, control flow, strings, bytes, structs, unions, lists, and maps.

FLOW

Reusable DSLs

Wrap complex binary conventions into usable APIs — the APIs are XIRASM source itself, ready to modify and reuse.

DATA

Data-driven generation

Read text, bytes, JSON, and TOML, transform them freely — the binary output is identical every time.

DIAG

Precise binary layout

Regions, labels, alignment, reserves, and fixups are all under direct control, with nothing hidden in the final output.

04 / FORMATS AS XIRASM DSL

Executable formats are implemented as XIRASM DSLs.

PE, COFF, ELF, Mach-O — the whole executable-format library is XIRASM source: use it as is, modify it freely, and follow it to write your own format DSLs. Executables are built by hand from end to end, with zero external tools.

PEWindows executables and DLLsPE32 / PE64

COFFWindows object filesCOFF32 / COFF64

ELFExecutables, PIEs, objects, and shared librariesELF32 / ELF64

MACH-OApple executables and object filesMACH-O 64

APKAndroid packages with a compiled resource table and native librariesZIP / ARSC

RAWFlat and application-specific binariesDIRECT BYTES

05 / WHAT'S NEW

What each version changed, spelled out.

Check the highlights before upgrading; open the full history for details.

2026-10-10 FEATURE

Android SDK types and native floating-point fields.

0.3.5 adds typed Android structures, f32 and f64 structure fields, and checked imports backed by exact library, API, ABI, kind, and version records across five Android ABIs.

2026-10-10 FIX

Correct SPIR-V words and safer compile-time state.

0.3.4 corrects SPIR-V constants, 64-bit Switch and extension schemas, protects caller-owned Meta values, and updates the generated AArch64 library. Includes backend 0.1.5.

2026-09-15 PERFORMANCE

Less repeated work in Meta and DSL evaluation.

Version 0.3.3 removes two pieces of repeated work from Meta and DSL evaluation: a condition is parsed once instead of on every execution, and captured bindings are borrowed instead of copied again. A 100,000-instruction AArch64 source lowers in about 43 s instead of 100 s, with identical output.

2026-09-13 PERFORMANCE

Faster AArch64 macro expansion.

Version 0.3.1 takes two copies out of the AArch64 macro path: a capture no longer deep-copies the generated tables, and a read-only built-in borrows the collection it is handed instead of copying it first. The bytes it encodes are unchanged.

2026-09-12 FEATURE

The first release ready for real work.

0.3.0 is the first release for actual use: the documentation and every example are assembly-verified, and Android builds an installable APK from native sources alone.

2026-09-10 FEATURE

Android APKs, resource trees, and compressed entries.

0.2.21 completes the full Android APK pipeline: resource directories compile into resources.arsc, framework resource IDs resolve by name, and archive entries support DEFLATE compression.

2026-09-09 FEATURE

AArch64, Mach-O, and native Apple Silicon builds.

0.2.19 adds ARM64 encoding and the Mach-O format DSL, with release packages for three platforms.

ALL RELEASE NOTES

06 / XIRASM 0.3.5

Pick your platform and download.

Each assembler archive contains the executable, Apache 2.0 license, include library, tests, and current English and Chinese documentation. The VS Code package adds editor support and the language server; assembly uses an installed XIRASM package.

SHA256 checksums

WINDOWS / X86-64

Windows

Native Windows console executable.

ZIP / 15.68 MiB

Download

LINUX / X86-64

Linux

Statically linked Linux executable.

TAR.GZ / 14.40 MiB

Download

MACOS / APPLE SILICON

macOS

Native ARM64 executable for Apple Silicon Macs.

TAR.GZ / 14.36 MiB

Download

VS CODE / LSP

VS Code extension

Syntax, diagnostics, completion, hover, and language server. Uses an installed XIRASM assembler.

VSIX / 0.27 MiB

Download

07 / DOCUMENTATION

Get the examples running first, then go deeper when you need to.

Dedicated guides cover the language, built-in APIs, executable formats, and hand-built binaries.

01Language guide Syntax, values, control flow, modules, regions, and finalization. 02Executable format tutorial Practical guides for PE, COFF, ELF, and Mach-O. 03Advanced construction Regions, coordinates, imports, relocations, and custom finalization logic. 04API reference Exact compile-time forms and built-in API contracts.

zig build -Doptimize=ReleaseSafe
zig-out\bin\xirasm.exe hello.asm --target x86-64 -o hello.bin

ONE LANGUAGE / MULTIPLE INSTRUCTION SETS / REAL BINARIES

CPU instructions remain assembly source; everything else is handled by the compile-time language.

From machine code to reusable format DSLs, XIRASM keeps the source readable and the output under your control.

Open on GitHub